By Brian Coppa, Research Analyst at Global Patent Solutions

Analysts at the Semiconductor Industry Association (SIA) and World Semiconductor Trade Statistics (WSTS) forecast increased growth in 2014 and 2015, due to double-digit increases in monthly semiconductor microchip sales year-over-year. The global semiconductor market maintained its strong bullish growth run in April, with year-over-year sales increasing across every region and product category. This semiconductor market growth is exceeding the pace set in 2013, which was a record year for semiconductor revenues. Furthermore, April marked the 12th consecutive month that year-over-year sales have increased, and that trend is expected to continue during the remainder through 2015. This industry is striving to meet the requirements for next-generation microchip technology for data centers and mobile devices, which continue to seek reduced power consumption, which is subsequently beneficial for the environment as well. In order to meet this goal, the industry is boosting RD spending which is subsequently leading to many new invention disclosures on advanced semiconductor technology.

In the May 2014 World Fab Forecast publication, SEMI tracks more than 200 major expansion projects involving equipment spending for new equipment or upgrades, as well as projects to build new facilities or refurbish existing facilities. SEMI now forecasts 24 percent growth up to about $35.7 billion for fab equipment spending for front-end facilities in 2014 and 11 percent growth up to about $39.5 billion in 2015. In terms of equipment spending, 2015 is on par to surpass an all-time record year 2011, which is music to the ears of equipment-makers that have had to endure ongoing frequent boom and bust cycles over the last decade. As a result, many equipment-makers are seeking to develop and patent new materials, processes such as shallow trench isolation (which I focused on previously at Micron Technology including US Patent application # 2008/0179715 A1) and wafer manufacturing systems for advanced microchip node sizes. Often first-movers become leaders and once a chip-making fab locks in an equipment vendor for a particular application, they have the upper-hand over competitors for usually two to three years at a minimum.

According to the SEMI World Fab Forecast, by the end of 2014, there will be 26 high-volume production semiconductor fabs using technology nodes between 14nm to 16nm, including two with 3D-NAND, which is the new wave of memory to boost density with less aggressive leaps in node sizes, while offering a pathway for solid-state disk drives (SSDs) to reach the terabyte level for enterprise storage in data centers. By the end of 2015, this is expected to increase to 33 fabs with 14nm to 16nm process nodes, including 11 with 3D-NAND including Samsung and Toshiba/SanDisk. These companies as well as Micron may be battling out patent infringement on this technology in the courts in the coming years, as they jockey for position in the race to displace hard disk drives for enterprise storage in data centers using NAND flash; thus, reducing the commoditization of NAND flash, which will stabilize average-selling-prices and boost revenues dramatically.

Forecasted IC volume fabs, not counting foundries, will reach full capacity by 2018. Considering the unlikeliness for high-volume 450mm fabs in the near future, and that overall capacity is lost when upgrading facilities to leading-edge nodes, the industry will have to add more 300mm fabs to compensate for increased demand. The timeline to build and equip these new complex facilities suggests that new 300mm fab plans will need to start by next year.

The arrival of the era of 18-inch wafer foundry processes may not come until 2018 as Intel reportedly has slowed down the development of 18-inch wafers, while semiconductor equipment supplier ASML has also temporarily discontinued development of production equipment for 18-inch wafers, according to industry sources. This wafer size transition cycle has been pushed out several years already from its original target date. Samsung, being the largest supplier of DRAM and NAND flash chips, is the strongest advocate for shifting the industry toward 18-inch wafers, as larger wafers would significantly help reduce production costs for memory chips using 10nm or below processes for SSDs.

The development of 18-inch wafers is also included in TSMC’s roadmap as the Taiwan-based foundry house has already developed plans to develop 16nm, 10nm and 7nm processes, after taking a leading role previously in the 28nm and 20nm segments, along with Intel, Samsung, and Global Foundries. However, reaching those node sizes is an ever-challenging milestone, as photolithography chip patterning capabilities wane. While there may be a non-extreme ultraviolet (EUV) litho roadmap for 7nm using iterations of multiple patterning (which I helped patent while at Micron including US Patent # US8129289 B2), the strategy at the 5nm node is less clear. Many predict the emergence of fully-depleted silicon-on-insulator (FD-SOI) technology, III-V elemental compound semiconductor channels for mobility enhancement and nanowire patterning schemes to become strong potential candidates at that time, which will lead to a big boost in the number of patent applications in this field over the next several years.